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Java LogicGate Progamming SourceCode
- 一个用面向对象方法封装和编写的JAVA Logicgate(逻辑门）运算程序,内附有详细的开发/说明文档(Doc文件）和分析流程图，主程序Main()存在于：And.java 文件 请先编译其余文件，最后编译运行And.java文件-an object-oriented methods and the preparation of the package Logicgate JAVA (logic gates) Operational way sequence, enclosing a deta
grdemulator
- 这是我毕业设计时做的，时间有限，我只做了逻辑门，触发器没做。压缩包中包含论文WORD文档。-This is my graduation design done, the time is limited, I only had logic gates, flip-flop not done. Compression package contains papers Word document.
vhdl
- This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The examp terms of basic logic gates, to more complex systems, such as a behaviou
100exampleofvhdl
- 100个VHDL例子，包括各种逻辑门、组合逻辑电路及时序电路-100 VHDL examples, including a variety of logic gates, combinational logic circuit and timing circuit
shuziluoji
- 数字逻辑基础知识与习题指导：数制及编码，逻辑代数基础，逻辑门电路，组合逻辑电路等-Digital logic based on knowledge and exercise guidance: Number System and coding, the basis of logic algebra, logic gates, combinational logic circuit, etc.
vhdl_manygoodmodel
- VHDL例程集锦，有很多例子，从简单的逻辑例程到复杂的微操作系统和相关存储器。-This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The examples range from simple combinationa
BaseGate
- ep2c5 实现 逻辑门 verilog语言，quartus 2 仿真-ep2c5 the realization of logic gates verilog language, quartus 2 Simulation
SR_Latch
- RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit i
Minaret.tar
- Minaret: retiming edge-triggered circuit for improved performance and higher clock frequency by moving combinational logic gates across sequential elements
GAL16V8
- GAL16V8可以实现基本门电路功能 CPUL语言编写-The basic logic gates implemented in GAL16V8
mux4x1
- mux 4x1 with 2 control inputs, written in VHDL using 3 mathods: Logic gates, if, case. the fastest model is the one implemented with the case code.
Ripple_Counter
- Ripple carry counter with 4 bit resolution implemented in behavioral VHDL. attaches as well is a jpg with the logic gates bock diagram. this is an asinchronous design.
PC-based-IC-tester
- This project is used to check the Basic logic gates (AND, OR, NOT, NAND, NOR, EX-OR). You can check the following IC s 7400, 7402, 7404, 7408, 7432, 7486 Visual Basic Program is used to show the results on the PC. The Microcontroller AT89S52
digital_logic_gates
- A graphic simulation of digital logic gates whitch can be used in DIGITAL DESIGN
logic-gates
- it is a new theory of gats which describes all function of gates and all fundamental things of gates which is used in digital electronics
Gates
- Program for The Logic Gates
Logic-gates-experiment
- 逻辑门实验，用于物理课程的讲解，使用的是光敏电阻和驻极体话筒作为光传感器和声音传感器，硬件比较简单。使用的是STC12C5A60S2单片机。里面可以实现所有的基本逻辑门演示功能。-Logic gate experiment, explain the physical course, using a photosensitive resistance and electret microphone as optical sensors and sound sensors, hardware is
ALL-GATES
- ALL LOGIC GATES USING VHDL SOURCE CODE
Adder-Designs-using-Reversible-Logic-Gates
- REVERSIBLE LOGIC BASED ADDERS DOCUMENTATION
Exp-02-Logic-Gates---Copy
- experiment 2 logic gates